1. Field of the Invention
The present invention relates to a fabrication method for an oxide layer. More particularly, the present invention relates to a fabrication method for a gate oxide layer wherein the hot carrier effect is mitigated and the interface trap charges are reduced.
2. Description of the Related Art
The formation of a silicon dioxide (SiO.sub.2) layer on a silicon surface is introduced at different states of an integrated process technology for the various purposes. One such function of these layers is to provide high-quality dielectrics such as a gate oxide layer in the metal oxide semiconductor (MOS) devices.
The layer of silicon dioxide on a silicon semiconductor substrate can either be formed by the dry oxidation method in which sufficiently dried high purity gaseous oxygen is supplied to a heated silicon semiconductor substrate. Wet oxidation can also be carried out conveniently by the pyrogenic technique in which hydrogen and oxygen combine exothermically in the presence of a flame to form a pure water vapor and oxygen ambient. The pyrogenic technique assures a high-purity steam, provided high purity gases are used. Comparing to the oxide layer formed by dry oxidation, a silicon dioxide layer prepared by pyrogenic oxidation is superior in dielectric breakdown properties and long-term reliability. The oxide layer formed by pyrogenic oxidation, however, is inferior in resistance against the hot carrier effect due to the electron-trapped charges attributed to the presence of water. As the device dimensions are further reduced in deep sub-micron manufacturing, the hot carrier effect will become more prominent.
These electron-trapped charges are thought to result from several sources, including structural defects resulting from the oxidation process, metallic impurities or the bond-breaking process. The trapped charges in the gate oxide layer raises the threshold voltage of the device and causes a long-term device degradation. Subjecting the silicon dioxide layer already formed on a silicon surface to a heat treatment in a nitrogen atmosphere has been shown to decrease the fixed charges at the interface and to reduce the energy state at the interface. Introducing nitrogen neutralizes the dangling bonds at the SiO.sub.2 /Si interface.
With respect to a flash memory device, electrons are injected or discharged through a floating gate to write or erase data. During such operations, the control gate, the source and the drain are held at appropriate voltages to generate hot electrons. Once these electrons gain sufficient energy and overcome the potential barrier of the gate oxide layer, they travel from the substrate and inject into the floating gate. The injection of the hot electrons, however, easily ruptures the N--H bonds and the Si--H bonds at the SiO.sub.2 /Si interface, resulting in an increase of the interface-trapped charges and interface energy state. If trapped charges are present in the gate oxide layer of flash memories, the threshold voltage of the transistors constituting the flash memory would fluctuates, leading to a malfunction of the flash memory.